Title Statements
- Full title :Advanced backend code optimization / Sid Touati, Benoit Dupont de Dinechin.
Summary
This book is a summary of more than a decade of research in the area of backend optimization. It contains the latest fundamental research results in this field. While existing books are often more oriented toward Masters students, this book is aimed more towards professors and researchers as it contains more advanced subjects. It is unique in the sense that it contains information that has not previously been covered by other books in the field, with chapters on phase ordering in optimizing compilation; register saturation in instruction level parallelism; code size reduction for softw.
Read More ↓Edition Statements
- Publication Date:©2014
Publication Statements
- Publisher(s):ISTE, John Wiley & Sons
- Place of Publication:London
- Language:eng
- Publication Date:©2014
The Physical Object
- Description:1 online resource (1 volume) : : illustrations
Edition Identifiers
- ISBN:9781118648957, 1118648951, 184821538X, 9781848215382
- oclc:ocn904769488
- LC Classification:QA76.76.C65
- Dewey Decimal:004.24
Table of Contents
Cover; Title Page; Copyright; Contents; Introduction; Part 1. Prolog: Optimizing Compilation; Chapter 1. On The Decidability Of Phase Ordering In Optimizing Compilation; 1.1. Introduction to the phase ordering problem; 1.2. Background on phase ordering; 1.2.1. Performance modeling and prediction; 1.2.2. Some attempts in phase ordering; 1.3. Toward a theoretical model for the phase ordering problem; 1.3.1. Decidability results; 1.3.2. Another formulation of the phase ordering problem; 1.4. Examples of decidable simplified cases; 1.4.1. Models with compilation costs.
1.4.2. One-pass generative compilers1.5. Compiler optimization parameter space exploration; 1.5.1. Toward a theoretical model; 1.5.2. Examples of simplified decidable cases; 1.6. Conclusion on phase ordering in optimizing compilation; Part 2. Instruction Scheduling; Chapter 2. Instruction Scheduling Problems And Overview; 2.1. VLIW instruction scheduling problems; 2.1.1. Instruction scheduling and register allocation in a code generator; 2.1.2. The block and pipeline VLIW instruction scheduling problems; 2.2. Software pipelining; 2.2.1. Cyclic, periodic and pipeline scheduling problems.
2.2.2. Modulo instruction sched…
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