High speed CMOS design styles

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High Speed CMOS Design Styles is written for the graduate level student or practicing engineer who is primarily interested in circuit design. It is intended to provide practical reference, or "horse-sense" to mechanisms typically described with a more academic slant. This book is organized so that it can be used as a textbook or as a reference book.

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Title Statements

Full title :High speed CMOS design styles / Kerry Bernstein [and others].

Summary

Edition Statements

Publication Date:©1999.

Publication Statements

Publisher(s):Kluwer Academic Publishers
Place of Publication:Boston
Language:eng
Publication Date:©1999.

The Physical Object

Description:xix, 352 pages : : illustrations ; : 25 cm

Edition Identifiers

ISBN:079238220X, 9780792382201
oclc:ocm39291455
LC Classification:TK7871.99.M44
Dewey Decimal:621.3815/2

Ch. 1. Process Variability -- Ch. 2. Non-Clocked Logic Styles -- Ch. 3. Clocked Logic Styles -- Ch. 4. Circuit Design Margin and Design Variability -- Ch. 5. Latching Strategies -- Ch. 6. Interface Techniques -- Ch. 7. Clocking Styles -- Ch. 8. Slack Borrowing and Time Stealing -- Ch. 9. Future Technology.

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