Title Statements
- Full title :Logic minimization algorithms for VLSI synthesis / by Robert K. Brayton .
Edition Statements
- Publication Date:1985
- Edition:3. print
Publication Statements
- Publisher(s):Kluwer
- Place of Publication:Boston
- Language:eng
- Publication Date:1985
The Physical Object
- Description:IX, 193 Seiten : Diagramme
Edition Identifiers
- ISBN:0898381649, 9780898381641
- oclc:on1067411981
Subjects
Writers
More from this Series
No reviews yet. Be the first to rate this work.
Files & Downloads
-
Logic Minimization Algorithms for VLSI Synthesis …
DJVU · 3.0 MB · updated -
Logic minimization algorithms for VLSI synthesis …
PDF · 10.7 MB · updated -
The Bounding Approach to VLSI Circuit Simulation …
PDF · 13.1 MB · updated -
Logic Minimization Algorithms for VLSI Synthesis …
PDF · 18.5 MB · updated
Rate & Review