Logic minimization algorithms for VLSI synthesis

Logic minimization algorithms for VLSI synthesis

by Brayton, Robert King

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Title Statements

  • Full title :Logic minimization algorithms for VLSI synthesis / by Robert King Brayton a.o.

Edition Statements

  • Publication Date:1984.

Publication Statements

  • Publisher(s):Kluwer
  • Place of Publication:Boston - Mass. a.o
  • Language:eng
  • Publication Date:1984.

The Physical Object

  • Description:IX, 193 Seiten ; : fig.; Tabellen. : 24 cm :

Edition Identifiers

  • ISBN:0898381649, 9780898381641
  • oclc:ocn636742002
  • LC Classification:TK7868.L6
  • Dewey Decimal:621.381/73

Subjects

Algorithmes ALGORITHMS Algorithmus Circuits intégrés -- Conception et cons… Circuits intégrés à très grande échelle Circuits intégrés à très grande échelle… CLASSICAL LOGICAL SYSTEMS (MATHEMATICAL… Computer algorithms HÖCHSTINTEGRIERTE SCHALTUNGEN, VLSI (MI… Integrated circuits -- Design and const… Integrated circuits -- Very large scale… INTÉGRATION À TRÈS GRANDE ÉCHELLE, VLSI… KLASSISCHE LOGISCHE SYSTEME (MATHEMATIS… Logic design Minimierung Optimierung Structure logique synthese SYSTÈMES LOGIQUES CLASSIQUES (LOGIQUE M… VERY LARGE SCALE INTEGRATED CIRCUITS, V…

Writers

Brayton, Robert King

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