Logic synthesis and verification

Logic synthesis and verification

by Hassoun, Soha Sasao, Tsutomu

Type Book
Rate 0.0 /5
Details
Files
Reviews
Download

Title Statements

  • Full title :Logic synthesis and verification / editors, Soha Hassoun, Tsutomu Sasao.

Edition Statements

  • Publication Date:©2002.

Publication Statements

The Physical Object

  • Description:xiv, 454 pages : : illustrations ; : 24 cm.

Edition Identifiers

  • ISBN:0792376064, 9780792376064
  • oclc:ocm48055483
  • LC Classification:TK7868.L6
  • Dewey Decimal:621.39/5

Subjects

CAD Circuitos lógicos Circuits logiques -- Conception assisté… Logic circuits -- Computer-aided design Logic design -- Data processing Structure logique -- Informatique

Writers

Hassoun, Soha Sasao, Tsutomu

More from this Series

  • Top-down design of high-performance sigma-delta modulators

    2001.
    more →
    Top-down design of high-performance sigma-delta modulators

  • Top-down design of high-performance Sigma-Delta modulators

    ©1999.
    more →
    Top-down design of high-performance Sigma-Delta modulators

  • Top-down design of high-performance sigma-delta modulators

    ©1999.
    more →
    Top-down design of high-performance sigma-delta modulators

  • Top down design of high performance sigma delta modulators

    2009.
    more →
    Top down design of high performance sigma delta modulators

  • Top-down design of high-performance sigma-delta modulators

    ©1999.
    more →
    Top-down design of high-performance sigma-delta modulators

Rate & Review

0.0/5
(0 people Voted)

No reviews yet. Be the first to rate this work.

Files & Downloads

  • Logic Synthesis and Verification -- (.djvu)

    DJVU · 10.9 MB · updated
    Login →

  • Logic synthesis and verification -- (.pdf)

    PDF · 36.5 MB · updated
    Login →
Log in to request a copy