Multi-processor system-on-chip

Multi-processor system-on-chip

by Andrade, Liliana Rousseau, Frédéric

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Title Statements

  • Full title :Multi-processor system-on-chip. / coordinated by Liliana Andrade, Frédéric Rousseau.

Edition Statements

  • Publication Date:2021.

Publication Statements

  • Publisher(s):ISTE Ltd, Wiley
  • Place of Publication:London
  • Language:eng
  • Publication Date:2021.

Notes

6.4.1. SIMPLE.

The Physical Object

  • Description:1 online resource (321 pages)

Edition Identifiers

  • ISBN:9781119818298, 111981829X, 9781119818274, 1119818273
  • oclc:on1243532832
  • LC Classification:TK7895.E42
  • Dewey Decimal:006.2/2

Table of Contents

Cover -- Half-Title Page -- Dedication -- Title Page -- Copyright Page -- Contents -- Foreword -- Acknowledgments -- PART 1: Processors -- 1 Processors for the Internet of Things -- 1.1. Introduction -- 1.2. Versatile processors for low-power IoT edge devices -- 1.2.1. Control processing, DSP and machine learning -- 1.2.2. Configurability and extensibility -- 1.3. Machine learning inference -- 1.3.1. Requirements for low/mid-end machine learning inference -- 1.3.2. Processor capabilities for low-power machine learning inference -- 1.3.3. A software library for machine learning inference

1.3.4. Example machine learning applications and benchmarks -- 1.4. Conclusion -- 1.5. References -- 2 A Qualitative Approach to Many-core Architecture -- 2.1. Introduction -- 2.2. Motivations and context -- 2.2.1. Many-core processors -- 2.2.2. Machine learning inference -- 2.2.3. Application requirements -- 2.3. The MPPA3 many-core processor -- 2.3.1. Global architecture -- 2.3.2. Compute cluster -- 2.3.3. VLIW core -- 2.3.4. Coprocessor -- 2.4. The MPPA3 software environments -- 2.4.1. High-performance computing -- 2.4.2. KaNN code generator -- 2.4.3. High-integrity computing

2.5. Conclusion -…

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Subjects

Multiprocesseurs Multiprocessors Systèmes sur une puce Systems on a chip

Writers

Andrade, Liliana Rousseau, Frédéric

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