Secured hardware accelerators for DSP and image processing applications

by Sengupta, Anirban, (Computer scientist)

Type Book

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Title Statements

Full title :Secured hardware accelerators for DSP and image processing applications / Anirban Sengupta.

Summary

This book presents state-of-the art security solutions and optimization algorithms employed for designing secured hardware accelerators for DSP, multimedia and image processing applications. Broadly, the theme of this book includes the following: secured and optimized hardware accelerators for DSP and image processing applications; cryptography-driven IP steganography for DSP hardware accelerators; double line of defence to secure JPEG codec hardware for medical imaging systems; integrating multi-key-based structural obfuscation and low-level watermarking for double line of defence of DSP hardware accelerators; multimodal hardware accelerators for image processing filters; fingerprint biometric for securing hardware accelerators; key-triggered hash-chaining-based encoded hardware steganography for securing DSP hardware accelerators; N-point DFT hardware accelerator design using obfuscation and steganography; and structural transformation and obfuscation frameworks for data-intensive IPs.

Edition Statements

Publication Date:©2021

Publication Statements

Publisher(s):The Institution of Engineering and Technology
Place of Publication:Stevenage
Language:eng
Publication Date:©2021

Notes

Written by an acknowledged expert in the field, this book focuses on approaches for designing secure hardware accelerators for digital signal processing and image processing. State-of-the art security and optimization algorithms are presented, and their roles in the design of secured hardware accelerators explored.

The Physical Object

Description:xl, 364 pages : : illustrations ; : 24 cm.

Edition Identifiers

ISBN:1839533064, 9781839533068
oclc:on1231548833
LC Classification:TA1637

Introduction : secured and optimized hardware accelerators for DSP and image processing applications / Anirban Sengupta -- Cryptography-driven IP steganography for DSP hardware accelerators / Anirban Sengupta -- Double line of defence to secure JPEG codec hardware for medical imaging systems / Anirban Sengupta -- Integrating multi-key-based structural obfuscation and low-level watermarking for double line of defence of DSP hardware accelerators / Anirban Sengupta -- Multimodal hardware accelerators for image processing filters / Anirban Sengupta -- Fingerprint biometric for securing hardware accelerators / Anirban Sengupta -- Key-triggered hash-chaining-based encoded hardware steganography for securing DSP hardware accelerators / Anirban Sengupta -- Designing a secured N-point DFT hardware accelerator using obfuscation and steganography / Anirban Sengupta and Mahendra Rathor -- Structural transformation-based obfuscation using pseudo-operation mixing for securing data-intensive IP cores / Anirban Sengupta and Mahendra Rathor.

Subjects

Accélérateurs de particules Cryptographie Cryptographie à clé publique Cryptography Image processing Imagerie médicale Imaging systems in medicine Particle Accelerators public key cryptography Traitement d'images