The Verillog® Hardware Description Language
Thomas & Moorby's The Verilog® Hardware Description Language has become the standard reference text for Verilog. The Verilog® Hardware Description Language, Fifth Edition, is a valuable resource for engineers and students interested in describing, simulating, and synthesizing digital systems; the extensive number of simulatable examples and wide range of representation styles covered ensure its quick use in design. The book is also ready for use in university courses, having been used for intro…
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- Full title :The Verillog® Hardware Description Language / by Donald E. Thomas, Philip R. Moorby.
Summary
Thomas & Moorby's The Verilog® Hardware Description Language has become the standard reference text for Verilog. The Verilog® Hardware Description Language, Fifth Edition, is a valuable resource for engineers and students interested in describing, simulating, and synthesizing digital systems; the extensive number of simulatable examples and wide range of representation styles covered ensure its quick use in design. The book is also ready for use in university courses, having been used for introductory logic design and simulation through advanced VLSI design courses. An appendix with tutorial help and a work-along style is keyed into the introduction for new students. Material supporting a computer-aided design course on the inner working of simulators is also included.
Read More ↓Edition Statements
- Publication Date:2002.
- Edition:Fifth edition
Publication Statements
- Publisher(s):Springer US
- Place of Publication:Boston, MA
- Language:eng
- Publication Date:2002.
The Physical Object
- Description:1 online resource (xxi, 381 pages)
Edition Identifiers
- ISBN:9781402070891, 1402070896, 9780306476662, 0306476665, 9780387853444, 0387853448, 9780387849300, 0387849300
- DOI:10.1007/978-0-387-85344-4
- oclc:ocn853262292
- LC Classification:TK7888.4
- Dewey Decimal:621.3815
Table of Contents
Verilog -- A Tutorial Introduction -- Logic Synthesis -- Behavioral Modeling -- Concurrent Processes -- Module Hierarchy -- Logic Level Modeling -- Cycle-Accurate Specification -- Advanced Timing -- User-Defined Primitives -- Switch Level Modeling -- Projects.
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