Verification by error modeling: using testing techniques in hardware verification

Title Statements

• Full title :Verification by error modeling : using testing techniques in hardware verification / written by Katarzyna Radecka, Zeljko Zilic.

Edition Statements

• Publication Date:2003.

Publication Statements

• Publisher(s):Kluwer Academic Publishers
• Place of Publication:Boston
• Language:eng
• Publication Date:2003.

The Physical Object

• Description:1 online resource (xiv, 216 pages) : : illustrations

Edition Identifiers

• ISBN:030648739X, 9780306487392, 9781402076527, 1402076525
• oclc:ocn228118912
• LC Classification:TK7874.75
• Dewey Decimal:621.39/5

Subjects

Writers

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