Micro- and nanoelectronics: emerging device challenges and solutions
by Brozek, Tomasz Iniewski, Krzysztof
"Preface The progress in microelectronics in recent decades is really unimaginable. We have been witnessing unbelievable and so far undisturbed advance in device scaling and growth of integrated circuits in both functionality and complexity. Myths about the limits of miniaturization and scalability of transistors have been shattered one after another; roadblocks have been removed by power of human invention, fueled by market growth. The cost of a single transistor on silicon chip during the las…
Read More ↓Title Statements
- Full title :Micro- and nanoelectronics : emerging device challenges and solutions / edited by Tomasz Brozek, PDF Solutions Inc., San Jose, California, USA ; Krzysztof Iniewski, managing editor, CMOS Emerging Technologies Research Inc., Vancouver, British Columbia, Canada.
Summary
"Preface The progress in microelectronics in recent decades is really unimaginable. We have been witnessing unbelievable and so far undisturbed advance in device scaling and growth of integrated circuits in both functionality and complexity. Myths about the limits of miniaturization and scalability of transistors have been shattered one after another; roadblocks have been removed by power of human invention, fueled by market growth. The cost of a single transistor on silicon chip during the last 40 years decreased more than a million fold, as the number of devices on a single chip also increased more than a million fold, following the exponential dependence commonly known as the Moore's Law. Many people question if the semiconductor industry can achieve, or even afford, further scaling, especially because numerous challenges arise from both device physics and from manufacturing capabilities perspective. Traditional scaling based on reduction of physical dimensions of MOS transistors, with simultaneous reduction of supply voltages and dissipated power, is reaching its limits. It has been extended by innovations in device architecture, introduction of new materials, and inventive techniques of patterning features of nanometer size. This decreasing size comes at an increasing cost, so most recent technology generations do not offer much advantage in terms of cost per transistor, or cost per function, when compared to previous nodes"--
Read More ↓Edition Statements
- Publication Date:©2015
Publication Statements
- Publisher(s):CRC Press, Taylor & Francis Group
- Place of Publication:Boca Raton
- Language:eng
- Publication Date:©2015
The Physical Object
- Description:1 online resource (xix, 363 pages)
Edition Identifiers
- ISBN:1482214911, 9781482214918
- oclc:ocn894104108
- LC Classification:TK7874.84
- Dewey Decimal:621.3815
Table of Contents
Front Cover; Contents; Preface; Editor; Contributors; Chapter 1: SiGe BiCMOS Technology and Devices; Chapter 2: Si-Ge Interdiffusion, Dopant Diffusion, and Segregation in SiGe- and SiGe:C-Based Devices; Chapter 3: SiC MOS Devices : Nitrogen Passivation of Near-Interface Defects; Chapter 4: Fully Depleted Devices : FDSOI and FinFET; Chapter 5: Fully Depleted SOI Technology Overview; Chapter 6: FinFETs : Designing for New Logic Technology; Chapter 7: Reliability Issues in Planar and Nonplanar (FinFET) Device Architectures; Chapter 8: High-Mobility Channels.
Chapter 9: 2-D InAs XOI FETs : Fabrication and Device PhysicsChapter 10: Beyond-CMOS Devices; Chapter 11: Stateful STT-MRAM-Based Logic for Beyond-Von Neumann Computing; Chapter 12: Four-State Hybrid Spintronics-Straintronics for Ultra-Low Power Computing; Chapter 13: Nanoionic Switches as Post-CMOS Devices for Neuromorphic Electronics; Chapter 14: Physics-Based Compact Graphene Device Modeling; Chapter 15: Carbon Nanotube Vertical Interconnects : Prospects and Challenges; Chapter 16: Graphene Nanosheet as Ultrathin Barrier; Back Cover.
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