Advanced VLSI technology: technical questions with solutions

The trend in design and manufacturing of very large-scale integrated (VLSI) circuits is towards smaller devices on increasing wafer dimensions. VLSI is the inter-disciplinary science of the process of creating an integrated circuit (IC) by combining thousands of transistors into a single chip. VLSI design can reduce the area of the circuit, making it less expensive and requiring less power. The book gives an understanding of the underlying principles of the subject. It not only focuses on circuit design process obeying VLSI rules but also on technological aspects of prototyping and fabrication. All the clocking processes, interconnects, and circuits of CMOS are explained in this book in an understandable format. The book provides contents on VLSI Physical Design Automation, Design of VLSI Devices and also its Impact on Physical Design. The book is intended as a reference book for senior undergraduate, first-year post graduate students, researchers as well as academicians in VLSI design, electronics & electrical engineering, and materials science. The basics and applications of VLSI design from STA, PDA and VLSI Testing along with FPGA based Prototyping are covered in a comprehensive manner. The latest technology used in VLSI design is discussed along with the available tools for FPGA prototyping as well as ASIC design. Each unit contains technical questions with solutions at the end. Technical topics discussed in the book include: * Static Timing Analysis * CMOS Layout and Design rules * Physical Design Automation * Testing of VLSI Circuits * Software tools for Frontend and Backend design.

Includes index.

Preface xi -- Acknowledgement xiii -- List of Figures xv -- List of Tables xix -- List of Abbreviations xxi -- 1 Static Timings Analysis 1 -- 1.1 Timing Components 1 -- 1.1.1 Clock Signal 1 -- 1.1.2 Quartz Crystal 2 -- 1.1.3 Crystal Oscillator 2 -- 1.1.4 Clock Generator 2 -- 1.1.5 Clock Rate 3 -- 1.1.6 Clock Multiplier 3 -- 1.1.7 Clock Tree 3 -- 1.1.8 Clock Phase 3 -- 1.1.9 Clock Gating 4 -- 1.1.10 Clock Jitter 4 -- 1.1.11 Clock Latency 5 -- 1.2 Crosstalk 5 -- 1.2.1 Crosstalk Noise Due To Coupling Capacitance 5 -- 1.2.2 Coupling Capacitance 5 -- 1.3 Static Timing Analysis 6 -- 1.4 Unateness and Its Types 6 References 39 -- 2 CMOS Design and Layout 41 -- 2.1 Introduction 41 -- 2.2 CMOS-Design-Flow 42 -- 2.3 Stick Diagram 44 -- 2.3.1 Notations of Stick Diagram 44 -- 2.3.2 Rules to draw stick diagram 44 -- 2.4 Design Rules 46 -- 2.4.1 CMOS Lambda '?' Design Rules 46 -- 2.4.1.1 Design Rule Check 49 -- 2.4.2 Micron-Design-Rules 51 -- 2.5 Layout Design Rules 53 -- 2.5.1 Layered Representation of Layout 54 References 69 -- 3 Physical Design Automation 71 -- 3.1 Introduction 71 -- 3.2 Types of Cell for Physical Design Automation 71 -- 3.2.1 Well Tap Cells 71 -- 3.2.2 End Cap Cells 72 -- 3…